1. FIELD OF THE INVENTION
The present invention relates to an inverter parallel operation system in which a balance is maintained among effective powers output by inverters under parallel operation, and load distribution among the inverters under parallel operation is accomplished by controlling in such a manner that the output frequencies of the inverters under parallel operation is caused to agree with frequencies predetermined in accordance with the output effective power from each or any one of the inverter.
2. DESCRIPTION OF THE PRIOR ART
Inverters that are operated in parallel are publicly known, and Japanese Patent Publication No. 2678991 and Japanese Published Unexamined Patent Application No. 2000-32764, for example, disclosed the art of balancing effective powers among inverters under parallel operation.
These prior-arts are based on the fact that output effective powers can be controlled by advancing or lagging the frequency (phase) thereof.
These prior arts, however, take no account of balancing output reactive powers among inverters under parallel operation.
The aforementioned Japanese patent Publication No. 2678991 and Japanese Published Unexamined Patent Application No. 2000-32764 disclosed that effective powers are balanced among the inverters so as to eliminate unwanted cross-current powers among the inverters under parallel operation.
To eliminate the aforementioned cross-current power, it is necessary to accurately grasp the state of generation of cross-current power. That is, how to grasp the generation of cross-current power is of critical importance.
FIG. 26 is a circuit diagram of a system where two inverters are in parallel operation.
Numerals 122A and 122B in the figure refer to a-c generators, 133A and 133B to rectifier circuits with input voltages VA and VB, 134A and 134B to smoothing capacitors, 135A and 135B, and 136A and 136B to output terminals, respectively, 137A and 137B to inverters or inverter circuits with input voltages VA and VB, 138A and 138B to filter circuits, and F to a common load, respectively.
FIG. 27 is an equivalent circuit diagram in which only cross-currents in the circuit configuration of FIG. 26 are taken into account. Assuming that an effective power output by an inverter (137A) is PA,       P    A    ≅                    E        1        2                    4        ⁢                  xe2x80x83                ⁢                  (                                    r              1              2                        +                          x              1              2                                )                      ⁢          xe2x80x83        ⁢          {                        2          ⁢                      xe2x80x83                    ⁢                                    x              1                        ⁢                          (                                                θ                  1                                -                                  θ                  2                                            )                                      +                  2          ⁢                      xe2x80x83                    ⁢                                    r              1                        ⁢                          (                                                E                  1                                -                                  E                  2                                            )                                          }      
where r1=r2, and x1=x2. When the phase difference between internal voltages is assumed to be xcex81xe2x88x92xcex82=0,                     P        A            ≅                        2          ⁢                      xe2x80x83                    ⁢                                                    r                1                            ⁢                              (                                                      E                    1                                    -                                      E                    2                                                  )                                      ·                          E              1              2                                                4          ⁢                      xe2x80x83                    ⁢                      (                                          r                1                2                            +                              x                1                2                                      )                                =                                        r            1                    ·                      E            1            2                                    2          ⁢                      xe2x80x83                    ⁢                      (                                          r                1                2                            +                              x                1                2                                      )                              ⁢              xe2x80x83            ⁢              (                              E            1                    -                      E            2                          )              ,
and when E2 greater than E1, PA takes a negative value. That is, a cross-current power is allowed to flow in the inverter 137A.
The cross-current power flowing in the inverter 137A is returned to the input side of an H bridge comprising the inverter, charging the smoothing capacitor 134A connected to the input side of the H bridge to raise the terminal voltage of the smoothing capacitor 134A. The cross-current power flowing in the inverter 137A is not returned to the generator side. For this reason, the terminal voltage of the smoothing capacitor 134A continues to increase. This terminal voltage V becomes a voltage V determined by
EN=xc2xd CV2=J+xc2xdCV02 J=∫(xe2x88x92PA)dt
where EN: Energy
J: Amount of inflow power
C: Capacitance of the smoothing capacitor
V: Terminal voltage across the smoothing capacitor
V0: Initial value.
As the terminal voltage V of the smoothing capacitor 134A rises, the input voltage of the H bridge of the inverter 137A rises. As will be described later, however, the internal voltage E1 of the inverter 137A is fixed at a value determined by a sine-wave standard signal Vsin. in the PWM circuit which will be described later. Furthermore, raising the output voltage (which can be considered the internal voltage E1) means that control is performed to increase the amplitude of the sine-wave standard signal Vsin.
Since the presence of a cross-current power causes the terminal voltages of the smoothing capacitors 134A and 134B to unwantedly increase, as described above, it is necessary to inhibit the increase.
In the configuration shown in FIG. 26, the inverter circuits 137A and 137B on each side output high-frequency alternating voltages of a so-called square waveform as switching control is accomplished by on-off signals from the PWM circuit (not shown). The filter circuit 138A (the same applies to the filter circuit 138B) comprises two choke coils across the terminals 153A and 135A, and across the terminals 154A and 136A, and a capacitor across the terminal 135A and 136A, for example. Needless to say, the filter circuit 138A filters the high-frequency alternating voltage of a square waveform output by the inverter circuit 137A, and works in such a manner as to direct a desired sine-wave voltage of 50 Hz, for example, to the load.
In each inverter device as shown in FIG. 26, an output voltage (internal voltage) or output current of its own is extracted due to the need for detecting the power generated by itself.
In such a case, particularly when extracting the output voltage, various contrivances have to be worked out to cope with the effects of the high-frequency alternating voltage of a square waveform generated by the inverter device or the effects of the noise voltage introduced from the load.
FIG. 28 shows an example of conventional methods of drawing potentials. FIG. 29 shows an example of the method of drawing potentials disclosed in Japanese Patent Publication No. 2688660. Like numerals in each figure correspond to those used in FIG. 26.
In FIGS. 28 and 29, two choke coils are provided because there are two types of high frequencies and noises passing through the filter circuits (hereinafter referred to collectively as noises); noises a and b recirculating into the filter circuit 138A in an opposite phase, and noises c and d flowing in the filter circuit 138A in the same phase. The two choke coils are designed to inhibit both types of noises.
In the configuration shown in FIG. 28, a potential on the terminal 135A of a choke coil connected between the terminals 153A and 135A and a potential on the terminal 136A of the choke coil connected between the terminal 154A and 136A are introduced to a differential amplifier A where the output voltage of the inverter circuit is extracted as a difference between the two potentials.
In the configuration shown in FIG. 29, a potential on the terminal 153A of a choke coil connected between the terminals 153A and 135A and a potential on the terminal 154A of the choke coil connected between the terminal 154A and 136A are introduced to a differential amplifier A where the output voltage of the inverter circuit is extracted as a difference between the two potentials.
The configurations shown in FIGS. 28 and 29 have their advantages and disadvantages. In the configuration shown in FIG. 2, noises caused by high-frequency components from the inverter circuit can be easily suppressed, while noises from the load side are led to the input side of the differential amplifier. In some cases, therefore, an additional filter circuit may have to be added to the load side of the terminals 135A and 136A in FIG. 28, or on the input side of the differential amplifier.
In the configuration shown in FIG. 29, noises from the load side can be easily suppressed, but those from the inverter circuit side tend to be left intact. Furthermore, the presence of choke coils may cause a phase shift in the original output voltage (original sine-wave voltage) in the inverter circuit.
It is an object of the present invention to provide an inverter parallel operation system in which both the output effective power and output reactive power of inverters under parallel operation are balanced.
It is another object of the present invention to provide an inverter parallel operation system in which output reactive powers are balanced at all times among the inverters under parallel operation.
It is a further object of the present invention to provide an inverter parallel operation system in which the load sharing ratio of output effective power to be borne by each inverter can be determined appropriately among the inverters under parallel operation, even with the prior-art technology.
It is still a further object of the present invention to provide an inverter parallel operation system in which control is effected in such a manner as to increase the internal voltage of an inverter by detecting the presence of cross-current, thereby inhibiting the generation of unwanted cross-current.
It is still a further object of the present invention to provide a potential drawing circuit for minimizing possible effects of noises when bringing in the output voltage of an inverter circuit.
In disclosed embodiments, a first inverter is adapted to control the output frequency thereof by controlling control elements comprising the inverter, and a second inverter and subsequent inverters are adapted to control the output frequencies thereof by controlling control elements comprising the inverters, and power is fed to a common load after a choke coil provided on the output end of a first filter provided on the output side of the first inverter has been connected to a choke coil provided on the output end of a second filter provided on the output side of the second and subsequent inverters; the improvement comprising controlling effective powers generated by the first and second and subsequent inverters by detecting effective powers output by the fist inverter and/or the second and subsequent inverters, and controlling any one or both of output frequencies predetermined in accordance with the effective powers.